Hi, > -----Original Message----- > From: Michal Simek [mailto:michal.si...@xilinx.com] > Sent: Friday, July 25, 2014 3:08 PM > To: Andreas Färber; mon...@monstr.eu; Soren Brinkmann > Cc: Harini Katakam; Michal Simek; Andreas Olofsson; Matteo Vit; Sean > Rickerd; devicetree@vger.kernel.org; linux-arm-ker...@lists.infradead.org; > linux-ker...@vger.kernel.org; Rob Herring; Pawel Moll; Mark Rutland; Ian > Campbell; Kumar Gala; Russell King > Subject: Re: [PATCH v2 05/11] ARM: dts: zynq: Add QSPI for Parallella > > On 07/25/2014 10:42 AM, Andreas Färber wrote: > > Am 25.07.2014 09:59, schrieb Michal Simek: > >> On 07/25/2014 01:18 AM, Sören Brinkmann wrote: > >>> On Fri, 2014-07-25 at 01:00AM +0200, Andreas Färber wrote: > >>>> Prepare SPI0 and SPI1 while at it. > > > >> Patch subject is incorrect. You are adding SPI and QSPI. > > > > Yes, it originally added only QSPI, but I considered it a good deed to > > add SPI as well while already reading that part of the TRM. :) > > > >>>> > >>>> Signed-off-by: Andreas Färber <afaer...@suse.de> --- v2: New > >>>> > >>>> arch/arm/boot/dts/zynq-7000.dtsi | 37 > >>>> +++++++++++++++++++++++++++++++++++ > >>>> arch/arm/boot/dts/zynq-parallella.dts | 4 ++++ 2 files > >>>> changed, 41 insertions(+) > >>>> > >>>> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi > >>>> b/arch/arm/boot/dts/zynq-7000.dtsi index 8fd826a..eed3df0 > >>>> 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ > >>>> b/arch/arm/boot/dts/zynq-7000.dtsi @@ -122,6 +122,30 @@ > >>>> interrupts = <0 50 4>; }; > >>>> > >>>> + spi0: spi@e0006000 { + compatible = > "xlnx,zynq-spi-r1p6"; > >>>> + reg = <0xe0006000 0x1000>; + > >>>> status > = "disabled"; + > >>>> interrupt-parent = <&intc>; + interrupts = <0 26 4>; > + > >>>> clocks = <&clkc 25>, <&clkc 34>; + clock-names = > "ref_clk", > >>>> "pclk"; + #address-cells = <1>; + > >>>> #size- > cells = <0>; + }; > >>>> + + spi1: spi@e0007000 { + compatible = > >>>> "xlnx,zynq-spi-r1p6"; + reg = <0xe0007000 0x1000>; + > status > >>>> = "disabled"; + interrupt-parent = <&intc>; + > interrupts = > >>>> <0 49 4>; + clocks = <&clkc 26>, <&clkc 35>; + > clock-names > >>>> = "ref_clk", "pclk"; + #address-cells = <1>; + > #size-cells > >>>> = <0>; + }; + > >>> Until here things look good. > >>> > >>>> gem0: ethernet@e000b000 { compatible = "cdns,gem"; reg = > >>>> <0xe000b000 0x4000>; @@ -140,6 +164,19 @@ clock-names = "pclk", > >>>> "hclk", "tx_clk"; }; > >>>> > >>>> + qspi: qspi@e000d000 { + compatible = > >>>> "xlnx,zynq-spi-r1p6"; + reg = <0xe000d000 0x1000>; + > status > >>>> = "disabled"; + interrupt-parent = <&intc>; + > interrupts = > >>>> <0 19 4>; + clocks = <&clkc 10>, <&clkc 43>; + > clock-names > >>>> = "ref_clk", "pclk"; + num-cs = <1>; + > #address-cells = > >>>> <1>; + #size-cells = <0>; + }; + > >>> I'm not sure what the status of this driver is. I think QSPI is > >>> still under review on the mailing lists and I don't think we > >>> should add this yet. > > > >> Driver for qspi is not in the mainline yet but it doesn't mean that > >> this fragment won't work. Harini: Can you please correct me if I am > >> wrong? > >
It can be added but it will have to be disabled as there is no qspi driver at the moment in mainline. Regards, Harini
