On 02.09.2014 15:21, Krzysztof Kozlowski wrote: > Add clock provider for clocks in DMC domain including EPLL and BPLL. The > DMC clocks are necessary for Exynos3 devfreq driver. > > The DMC clock domain uses different address space (0x105C0000) than > standard clock domain (0x10030000 - 0x10050000). The difference is huge > enough to add new DT node for the clock provider, rather than extending > existing address space. > > Signed-off-by: Krzysztof Kozlowski <k.kozlow...@samsung.com> > > --- > > Changes since v1: > ================= > 1. Fix overwritteing main clock provider reg_base with DMC clock domain > reg_basr. This leads to OOPS in suspend.
Applied the whole series for next. Best regards, Tomasz -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
