On Sat, Sep 06, 2014 at 06:47:28PM +0800, Chen-Yu Tsai wrote: > The sun6i DMA controller requires the AHB1 bus clock to be > clocked from PLL6. This was originally done by the dmaengine > driver during probe time. The AHB1 clock driver has since been > unified, so the original code does not work. > > Remove the clk muxing code, and replace it with DT clk default > properties.
Applied, thanks -- ~Vinod -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
