Add the on-chip-memory controller node to the Zynq devicetree. Signed-off-by: Michal Simek <michal.si...@xilinx.com> ---
Changes in v3:
- Extract from OCM driver
Changes in v2: None
arch/arm/boot/dts/zynq-7000.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 6cc83d4c6c76..b8e87d615635 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -146,6 +146,13 @@
cache-level = <2>;
};
+ ocmc: ocmc@f800c000 {
+ compatible = "xlnx,zynq-ocmc-1.0";
+ interrupt-parent = <&intc>;
+ interrupts = <0 3 4>;
+ reg = <0xf800c000 0x1000>;
+ } ;
+
uart0: serial@e0000000 {
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "disabled";
--
1.8.2.3
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