On 10/21/2014 12:10 PM, Steffen Trumtrar wrote:
> Hi!
>
> On Tue, Oct 21, 2014 at 11:15:10AM -0500, dingu...@opensource.altera.com
> wrote:
>> From: Dinh Nguyen <dingu...@opensource.altera.com>
>>
>> Without this patch, the booting the SOCFPGA platform would hang at the
>> SDMMC driver loading. The issue, debugged by Doug Anderson, turned out
>> to be that the GPIO bank used by the SD card-detect was not set to
>> status="okay".
>>
>> Suggested-by: Doug Anderson <diand...@chromium.org>
>> Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com>
>> ---
>> v3: Correctly degugged the issue to be a gpio node not having status="okay"
>> ---
>> arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
>> b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
>> index d7296a5..03a3745 100644
>> --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
>> +++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
>> @@ -37,6 +37,12 @@
>> */
>> ethernet0 = &gmac1;
>> };
>> +
>> + soc {
>> + gpio@ff709000 {
>> + status = "okay";
>> + };
>> + };
>> };
>>
>
> Looks weird. Don't you need to enable the GPIO bank instead:
>
> &gpio1 {
> status = "okay";
> }
>
No, this will not work as gpio1 is already a node inside gpio@ff709000.
The reason for this was that the Designware GPIO IP can support 1, 2 or
3 gpio ports of varying widths. [1][2]
Dinh
[1]
http://article.gmane.org/gmane.linux.drivers.devicetree/72771/match=dw+apb+gpio
[2] http://article.gmane.org/gmane.linux.kernel/1671576/match=dw+apb+gpio
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