From: Jon Fraser <jfra...@broadcom.com>
BMIPS3300 processors do not have the hardware to support SMP, but with a
small tweak, the SMP ebase relocation code allows BMIPS3300-based
platforms to reuse the S2/S3 power management code from BMIPS4380-based
chips. Normally this is as simple as adding one line to prom_init():
board_ebase_setup = &bmips_ebase_setup;
Signed-off-by: Jon Fraser <jfra...@broadcom.com>
Signed-off-by: Kevin Cernekee <cerne...@gmail.com>
---
arch/mips/kernel/smp-bmips.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index 8383fa4..887c3ea 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -541,6 +541,7 @@ void bmips_ebase_setup(void)
&bmips_smp_int_vec, 0x80);
__sync();
return;
+ case CPU_BMIPS3300:
case CPU_BMIPS4380:
/*
* 0x8000_0000: reset/NMI (initially in kseg1)
--
2.1.1
--
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