Julius, On Thu, Mar 26, 2015 at 4:30 PM, Julius Werner <jwer...@chromium.org> wrote: > We have found that we can sometimes see read failures on boards with > high-capacitance SPI lines. It seems that the controller samples the Rx > data line too early, and its register interface has an "Rx Sample Delay" > setting to fine-tune against this issue. > > This patch adds a new optional device tree entry that can configure this > delay in terms of nanoseconds. The kernel will calculate the > best-fitting amount of parent clock ticks to program the controller with > based on that. > > Signed-off-by: Julius Werner <jwer...@chromium.org> > --- > .../devicetree/bindings/spi/spi-rockchip.txt | 4 ++++ > drivers/spi/spi-rockchip.c | 21 > +++++++++++++++++++++ > 2 files changed, 25 insertions(+)
Reviewed-by: Doug Anderson <diand...@chromium.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
