This pin setup provides the correct configuration in order to
interact with the CEC HW.
Signed-off-by: Erwan Le Ray <erwan.le...@st.com>
Signed-off-by: Nicolas Vanhaelewyn <nicolas.vanhaele...@st.com>
Acked-by: Patrice Chotard <patrice.chot...@st.com>
Signed-off-by: Patrice Chotard <patrice.chot...@st.com>
Signed-off-by: Peter Griffin <peter.grif...@linaro.org>
---
arch/arm/boot/dts/stih407-pinctrl.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi
b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index 0a754f2..d86ccc8 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -107,6 +107,14 @@
st,retime-pin-mask = <0x3f>;
};
+ cec0 {
+ pinctrl_cec0_default: cec0-default {
+ st,pins {
+ hdmi_cec = <&pio2 4 ALT1 BIDIR>;
+ };
+ };
+ };
+
rc {
pinctrl_ir: ir0 {
st,pins {
--
1.9.1
--
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