On Tuesday 22 September 2015 17:16:55 David Daney wrote: > From: David Daney <david.da...@cavium.com> > > The config space for external PCIe root complexes on some Cavium > ThunderX SoCs is very similar to CAM and ECAM, but differs in the > shift values that have to be applied to the bus and devfn numbers to > compose that address window offset. These root complexes also have > the interesting property that there is no root bridge, so the standard > manner of limiting scanning to only the first device doesn't work. We > can use the standard pci-host-generic driver if we make a minor > addition to handle these differences, so we... > > Add a mapping function for ThunderX PCIe root complexes with a bus > shift of 24 and devfn shift of 16. Ignore accesses for devices other > than the first device on the primary bus. > > Document the whole thing in devicetree/bindings/pci/host-generic-pci.txt > > Signed-off-by: David Daney <david.da...@cavium.com> > Acked-by: Will Deacon <will.dea...@arm.com> >
Acked-by: Arnd Bergmann <a...@arndb.de> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
