On Fri, Oct 09, 2015 at 05:15:30PM +0800, Shengjiu Wang wrote: > SPDIF_GCLK is also spdif's clock, it use a same enable bit with > SPDIF_ROOT_CLK, > We didn't separate them in clock tree before.
Is it the clock described as "Global clock" in Reference Manual, SPDIF chapter? If that's the case, you are just adding a missing SPDIF clock rather than fixing a low power mode issue, and I will be fine. But still you should reword the commit log to make it clear, that the patch is to correct a SPDIF clock setting issue, which is just discovered by low power mode support. Shawn -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
