According to device tree bindings for ARM cpus cpu node must contain a
reg property for enumeration scheme.
The change adds reg = <0x0> indicating that the processor does not
have CPU identification register and updates cell settings.
Signed-off-by: Vladimir Zapolskiy <v...@mleia.com>
---
Changes from v1 to v2:
- instead of removing address/size cells properties update them
in accordance to ARM CPU device tree bindings, thanks to Joachim for review
The change replaces 4/5 "arm: dts: lpc32xx: remove unneeded cell settings from
cpus"
arch/arm/boot/dts/lpc32xx.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index dcb52cb..343a94f 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -18,12 +18,13 @@
interrupt-parent = <&mic>;
cpus {
- #address-cells = <0>;
+ #address-cells = <1>;
#size-cells = <0>;
- cpu {
+ cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
+ reg = <0x0>;
};
};
--
2.1.4
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