On Mon, Nov 16, 2015 at 9:11 AM, Linus Walleij <linus.wall...@linaro.org> wrote: > On Tue, Nov 3, 2015 at 12:19 PM, Liu Gang <gang....@freescale.com> wrote: > >> The GPIO block for ls2080a platform has little endian registers, >> the GPIO driver needs this property to read/write registers by >> right interface. >> >> Signed-off-by: Liu Gang <gang....@freescale.com> >> >> diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> index f2455c5..c836dab 100644 >> --- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> +++ b/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt >> @@ -10,6 +10,9 @@ Required properties: >> the second cell is used to specify the gpio polarity: >> 0 = active high >> 1 = active low >> +- little-endian : Should be set if the GPIO has little endian >> + registers. No the property means the GPIO >> + registers are big endian mode. > > That is a very generic binding and I would like the devicetree > maintainers to say something about this. > > I would be OK if this is specified for *all* gpiochips in > Documentation/devicetree/bindings/gpio/gpio.txt > or even higher up in the desriptions. > > Just for Freescale seems a bit too local.
There is already a generic definition at Documentation/devicetree/bindings/common-properties.txt. But it will be special for Freescale controller to say that the default is big-endian for backward compatibility. Regards, Leo -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
