On Thu, 3 Dec 2015 12:02:22 +0000 Harvey Hunt <[email protected]> wrote:
> From: Alex Smith <[email protected]> > > Add device tree nodes for the NEMC and BCH to the JZ4780 device tree, > and make use of them in the Ci20 device tree to add a node for the > board's NAND. > > Note that since the pinctrl driver is not yet upstream, this includes > neither pin configuration nor busy/write-protect GPIO pins for the > NAND. Use of the NAND relies on the boot loader to have left the pins > configured in a usable state, which should be the case when booted > from the NAND. > > Signed-off-by: Alex Smith <[email protected]> > Cc: Zubair Lutfullah Kakakhel <[email protected]> > Cc: David Woodhouse <[email protected]> > Cc: Brian Norris <[email protected]> > Cc: Paul Burton <[email protected]> > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > Signed-off-by: Harvey Hunt <[email protected]> > --- > v8 -> v9: > - Represent the partition table as a subnode of a NAND chip. > > v7 -> v8: > - Describe the NAND chips as children nodes of the NAND controller. > - Remove ingenic, prefix from ECC settings. > - Renamed some ECC settings. > > v6 -> v7: > - Add nand-ecc-mode to DT. > - Add nand-on-flash-bbt to DT. > > v4 -> v5: > - New patch adding DT nodes for the NAND so that the driver can be > tested. > > arch/mips/boot/dts/ingenic/ci20.dts | 63 > ++++++++++++++++++++++++++++++++++ > arch/mips/boot/dts/ingenic/jz4780.dtsi | 26 ++++++++++++++ > 2 files changed, 89 insertions(+) > > diff --git a/arch/mips/boot/dts/ingenic/ci20.dts > b/arch/mips/boot/dts/ingenic/ci20.dts > index 9fcb9e7..782258c 100644 > --- a/arch/mips/boot/dts/ingenic/ci20.dts > +++ b/arch/mips/boot/dts/ingenic/ci20.dts > @@ -42,3 +42,66 @@ > &uart4 { > status = "okay"; > }; > + > +&nemc { > + status = "okay"; > + > + nandc: nand-controller@1 { > + compatible = "ingenic,jz4780-nand"; > + reg = <1 0 0x1000000>; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + ingenic,bch-controller = <&bch>; > + > + ingenic,nemc-tAS = <10>; > + ingenic,nemc-tAH = <5>; > + ingenic,nemc-tBP = <10>; > + ingenic,nemc-tAW = <15>; > + ingenic,nemc-tSTRV = <100>; I guess those are encoding controller specific timings. Maybe they could be automatically deduced from nand_timings information (I'm not asking to implement that right now, but keep it in the back of your mind as possible future improvements). -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
