From: Yakir Yang <y...@rock-chips.com>
ACLK_VIO is the noc bus clock for display module, display cann't
read data from ddr without this clock enabled.
Due to it shouldn't belong to any driver, but we need it enabled,
so just mark it as the CLK_IGNORE_UNUSED flag.
Signed-off-by: Yakir Yang <y...@rock-chips.com>
Signed-off-by: Caesar Wang <w...@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3036.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3036.c
b/drivers/clk/rockchip/clk-rk3036.c
index dc01a2a..b2cb5af 100644
--- a/drivers/clk/rockchip/clk-rk3036.c
+++ b/drivers/clk/rockchip/clk-rk3036.c
@@ -358,7 +358,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[]
__initdata = {
GATE(PCLK_HDMI, "pclk_hdmi", "pclk_cpu", 0, RK2928_CLKGATE_CON(3), 8,
GFLAGS),
/* aclk_vio gates */
- GATE(ACLK_VIO, "aclk_vio", "aclk_disp1_pre", 0, RK2928_CLKGATE_CON(6),
13, GFLAGS),
+ GATE(ACLK_VIO, "aclk_vio", "aclk_disp1_pre", CLK_IGNORE_UNUSED,
RK2928_CLKGATE_CON(6), 13, GFLAGS),
GATE(ACLK_LCDC, "aclk_lcdc", "aclk_disp1_pre", 0,
RK2928_CLKGATE_CON(9), 6, GFLAGS),
GATE(HCLK_VIO_BUS, "hclk_vio_bus", "hclk_disp_pre", 0,
RK2928_CLKGATE_CON(6), 12, GFLAGS),
--
1.9.1
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