Who are the lead developers of KiCAD who take that decision? I think already 
KiCAD might be able to do this thing. The only thing not implemented is that of 
exporting an edif file.
Thanking you
Sagar Acharya
https://designman.org



22 Apr 2023, 17:39 by [email protected]:

> Hi Sagar,
>
> There is definitely interest in including chip design capability in KiCad, 
> when that happens really depends on a lot of factors.  I'm not familiar with 
> the code listed below, but a good start to getting a feature like this into 
> KiCad would be to ensure all of the code in the list below is packaged for 
> all the platforms supported by KiCad[1]. Once that hurdle is cleared, we 
> would need to write a design document about how we would integrate support 
> for chip design into KiCad.  After the lead development team agrees on the 
> design document, then we could actually start any implementation as manpower 
> becomes available.
>
> Cheers,
>
> Wayne
>
> [1]: https://www.kicad.org/help/system-requirements/
>
> On 4/19/23 2:24 PM, 'Sagar Acharya' via KiCad Developers wrote:
>
>> For this purpose in free software, there are a few softwares like
>>
>> magic VLSI &
>> gdspy &
>> gdstk &
>> skywater-pdk
>> Thanking you
>> Sagar Acharya
>> https://designman.org
>>
>>
>>
>> 19 Apr 2023, 23:51 by [email protected]:
>>
>>> Respected devs,
>>>
>>> I was exploring into chip designs and except the aspects of automation of 
>>> placement and routing and testing for logic, at the end, semiconductor chip 
>>> design is extremely similar to designing a board.
>>>
>>> It consists of a bunch of blocks for different Si layers, oxide layers, 
>>> metal layers, etc. which in my view is already supported in kicad. If the 
>>> grid size is set to be of order of lambda, a parameter in chip design, say 
>>> like 40nm, an output of oasis file/edif file can result in a complete EDA.
>>>
>>> I welcome your thoughts on this.
>>>
>>> Thanking you
>>> Sagar Acharya
>>> https://designman.org
>>>
>
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