On Tuesday, 4 July 2017 at 21:10:45 UTC, Walter Bright wrote:
On 7/4/2017 1:15 PM, Stefan Koch wrote:
Most arm implementation are not as forgiving as contemporary
x86 processors when it comes to bad register scheduling and
the like.
The backend's scheduler is actually very effective. It mattered
with the Pentium and Pentium Pro processors, but not anymore.
But the code is still there, and still works, and the algorithm
is sound.
https://github.com/dlang/dmd/blob/master/src/ddmd/backend/cgsched.c
At a first glance it looks highly x86 specific.
I am not sure how much of this really lends itself to be applied
on arm.
The backend-IR does not seem to be able to express some ARM
concepts such as predicated instructions. While those maybe
shoehorned in, it is likely to be impractical to reuse most of
this code.
