https://d.puremagic.com/issues/show_bug.cgi?id=12121
Summary: atomicLoad!(MemoryOrder.acq) should not emit additional code on X86 Product: D Version: D2 Platform: All OS/Version: All Status: NEW Severity: normal Priority: P2 Component: druntime AssignedTo: nob...@puremagic.com ReportedBy: stanislav.bli...@gmail.com --- Comment #0 from Stanislav Blinov <stanislav.bli...@gmail.com> 2014-02-09 10:49:48 PST --- Current implementation of needsLoadBarrier in core.atomic is as follows: template needsLoadBarrier( MemoryOrder ms ) { enum bool needsLoadBarrier = ms != MemoryOrder.raw; } On X86, acquire loads should not require fences, release-acquire ordering is automatic. -- Configure issuemail: https://d.puremagic.com/issues/userprefs.cgi?tab=email ------- You are receiving this mail because: -------