And the Intel Xeon Phi (MIC) has XMM registers that are efficient when the arrays are aligned to 64 bytes.
Sorry, I meant to say ZMM registers.
Bye, bearophile
And the Intel Xeon Phi (MIC) has XMM registers that are efficient when the arrays are aligned to 64 bytes.
Sorry, I meant to say ZMM registers.
Bye, bearophile