Hi, I fixed the Horizontal Arc wire error and got a layout from VHDL. The Preferences - Technology - Technology Default options were not set at mocmos. After I changed Startup technology and Layout technology to use for Schematics it worked.
Perhaps the defaults should be mocmos or did something that I might have done change this. This is the first time I checked out the Technology options so any changes would have been automatic. Dan -----Original Message----- From: Zulaica, Daniel (Dan) (CIV) Sent: Tuesday, March 08, 2011 6:01 PM To: 'Steven Rubin'; [email protected] Subject: RE: Silicon Compiler error using VHDL Hi, I get the following error even trying the Silicon Compiler with the samples library, tool-SiliconCompiler, tool-SiliconCompiler{vhdl} =================================36================================= Compiling VHDL in cell 'tool-SiliconCompiler{vhdl}' ... Done, created cell 'tool-SiliconCompiler{net.quisc}' Reading netlist in cell 'tool-SiliconCompiler{net.quisc}' Placing cells Routing cells Generating layout SC Maker cannot find Horizontal Arc wire in technology artwork =================================37================================= I had the mocmos Layers selected. Thanks, Dan -----Original Message----- From: Steven Rubin [mailto:[email protected]] Sent: Wednesday, February 23, 2011 1:52 PM To: [email protected] Cc: Zulaica, Daniel (Dan) (CIV) Subject: Re: MUDDLib07 and Silicon Compiler At 12:03 PM 2/23/2011, you wrote: >Hi, > >Are there some extra steps to make to get a schematic using the MUDD Lib07 >components to automatically generate the layout? > >When I use the Silicon Compiler I get UNRESOLVED REFERENCES, > > power > PMOStran > nMOStran > ground > >Compiling the VHDL to the QUISC file. > >Then while reading the .quisc netlist for layout it says that 'ground' is not >in the standard cell library. The Mudd chip was not generated automatically from schematics...it was laid-out by hand. The Silicon Compiler in Electric is for gate placement only...not for placing individual transistors. And even if you did get it to work on the schematics, the placement would be pretty bad because the SC is 20 years old and still thinks in terms of making rows with routing channels inbetween. -Steven Rubin _______________________________________________ Discuss-gnu-electric mailing list [email protected] http://lists.gnu.org/mailman/listinfo/discuss-gnu-electric
