Eric Blossom wrote:
On Sat, Jun 18, 2005 at 01:26:27AM -0400, Krzysztof Kamieniecki wrote:

I confused as to how the USRP FPGA scales the ADC signal. It appears that on the setup we are using, which has some customized DC Rx daughter boards, when we put in a 2V p-p square wave with a DDC center frequency of zero and a decimation rate of 64 we are getting data that is p-p ~16000 counts, is this normal? I'll be checking how the normal Rx boards behave on Sunday.


Krys,

Seems low, but it may be normal.  Matt could confirm, but he's on his
way to Green Bank.

Eric



I measured the signal with the normal RX daughter boards and I got the same results. A 2V p-p sine signal (measured simultaniously on a real oscilloscope) showed a ~16000 count p-p signal in the gnuradio oscilloscope display.


--
Krzysztof Kamieniecki
callsign:KB1KLB
mailto:[EMAIL PROTECTED]


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