On Fri, Apr 14, 2006 at 11:51:36PM -0400, Elaine Garbarine wrote:
> On 4/14/06 6:58 PM, "Eric Blossom" <[EMAIL PROTECTED]> wrote:
> > On Fri, Apr 14, 2006 at 12:18:47PM -0400, Elaine Garbarine wrote:
> 
> > On problem that will need some thinking about is that we're using the
> > DUC in the AD9862 and we don't have a way to reset it's phase
> > accumulator short of cycling power.  If you need phase coherence on
> > Tx, you may have to implement the DUC in the FPGA.  I'm not absolutely
> > certain about this, but that's my suspicion.  I suggest spending some
> > time with the AD9862 data sheet.
> > 
> 
> This is actually exactly what I was afraid of. I'll spend some time with the
> data sheet and see what I can find out about the phase accumulator.  Do you
> know of a way to completely disable the DUC in the AD9862?  For my
> application all of our communications will be occurring at baseband (for the
> time being) so I don't necessarily need the DUC.

Yes.  As long as you *never* set the frequency to anything other than
zero after powerup, the AD9862 DUC is effectively out of the the loop,
and I'm pretty sure that its phase register is zero.  The library
startup code sets it only to zero.

> Regards,
> Elaine

Eric


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