Remember that the GPIF is currently set up to DMA 256 16-bit values. Perhaps that part needs changing. The magic value is probably buried in the WaveData table in usrp_gpif.c
I looked over the GPIF stuff with the Cypress tool I do not see any reference to transfer size in there. I am thinking the transfer size is set in the FPGA?
Another thing you could try is to set up the GPIF in a non-flowstate mode. You'd need to use the Cypress tool to do this (or Larry Doolittle's perl (?) code. Running in full speed, you don't need to be able to burst data at 96MB/sec between the FX2 and FPGA.
Do you have any idea what sort of changes to the 8051/FPGA code are involved? The machines I am using this with do not need high data rates (in fact more decimation in the FPGA would be helpful).
Philip, do you have access to a logic analyzer? It would extremely helpful for determining what's really happening between the FX2 and FPGA.
Agreed. Unfortunately, we are a communication group, not a digital hardware group. So we do not have a logic analyzer. Of course, these days, it is hard to tell the difference between a comm group and a digital hardware group. Philip
Eric
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