On Sat, 18 Aug 2007, Jens Elsner wrote:
On Fri, Aug 17, 2007 at 05:23:06PM -0600, Bahn William L Civ USAFA/DFCS wrote:
Q1) One of the formats in which I can send data to the USRP is as IQ data. What
does the USRP do with IQ data pairs? In the USRP documentation there is a block
diagram of the Digital Down Converter, but there is no diagram of the Digital
Up Converter.
It is exactly the opposite of the DDC. ...
I'm not sure if this is pertinent for your project, but there is code that does
just this in the FPGA, in the MRFM project in GNU Radio. This is not the usual
FPGA code that runs in the USRP, but it can run in the USRP. This code
implements the block diagram at
http://www.research.cornell.edu/KIC/events/MRFM2006/pdfs/Jacky%20talk/jacky-talk.html
in the slide labelled Heterodyne control. The block labelled DUC does the
upconversion, reconstructing x(t) from I and Q.
The DUC in this code is not the DUC used by the usual USRP FPGA code, which (as
I understand it) uses a built-in DUC in the Analog Devices chip. For our
application, we need to synchronize the DDC and DUC exactly. The only way to
do that was to put the DUC in the same FPGA program as the DDC.
This FPGA code is in the respository at
http://gnuradio.org/trac/browser/gnuradio/trunk/usrp/fpga/toplevel/mrfm
The Verilog code in mrfm_proc.v describes the block diagram discussed above.
Matt Ettus wrote this code.
Jon Jacky
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