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Brian Padalino wrote:
> The CIC filter has some bit-growth associated based on your decimation
> rate.  This growth is deifned for decimations up to 128 in that file.
> It basically takes a different "slice" of the CIC "comb" section at
> the end.
> 
> The reason it might be happening in the FPGA that doesn't have the
> halfband filter is because the halfband filter also decimates by 2 -
> so you would need 1/2 the decimation by the CIC.  So for cases where
> you would normally decimate by 192, the CIC is decimating by 96 and
> the halfband by 2.  In the case where there is no halfband, the CIC
> takes on all the responsibility and the extra growth is not accounted
> for.
> 
> If this was defined for values larger than 128, then the growth
> wouldn't happen and it could all be alleviated in the FPGA.  Hopefully
> this makes sense to everyone.

... and since the maximum USRP decimation is 256, 128 is the most you
would need in the CIC for the standard RBF... and no one ever got around
to/realized it needed to be done for higher decimation values when the
halfband is turned off? Seems logical.

- -Dan
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