Hi I read a lot of the USRP's Verilog lately and sort of figured out what happens on the FPGA. master_control.v generates all the control signals as far as I understand. I would just like to know how the strobe signals work.
Looking at master_control.v it seems as if rx_sample_strobe is always 1. strobe_decim is a clock signal (if decim=8, strobe_decim is going to be an 8MHz clock)? Is this correct? hb_strobe is going to be a 4MHz clock then and is used to tell the rx buffer how often we have samples available for the USB link? Thank you. Sebastiaan _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
