Thanks for the answer. I'm going to start working on it soon and then I'll come back here with the results (or with the problems :)
2009/6/15 Eric Blossom <e...@comsec.com> > On Wed, Jun 10, 2009 at 04:59:24PM -0300, Tiago Rogério Mück wrote: > > Hi all, > > > > I'm working on some experiments using the USRP2, and the 32 Kb available > for > > the firmware won't be enough for my experiments. I'll need to modify the > > FPGA code so I can use the 1 MB SRAM for both instructions and data for > the > > aeMB, but I'm a bit lost on how I can do this modifications. > > > > I looked the code and came to some conclusions about what needs to be > done: > > > > 1 - Change the memory map > > - Change the RAM space to 0 - 1 MB > > - Update the mapping of the buffer poll and the peripherals > > > > 2 - Change the logic inside the sys_ram block to forward access to > addresses > > beyond 32 K to the external SRAM > > > > 3 - Change the ram_loader parameters so it can load the entire firmware. > > > > Could someone tell me if I'm going to the right direction? I will be very > > grateful for any hint you can give me. > > Yes, this is the right direction. You'll probably want to include a > dcache to get any kind of throughput out of it. There's currently a > small icache. > > Eric >
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