Hello all, I've been trying to use some of the test benches provided from Ettus' site, in the "fpga/tb" directory. I'm using Quartus II and ModelSim with the latest version of the fpga code.
I'm assuming that fullchip_tb.v is the test bench for the full fpga. However, the test bench seems to be written for a different module; The test bench doesn't interface directly with usrp_std, and instead instantiates "fullchip". The ports are similar to usrp_std, but not the same. Was the test bench written for something else? Any additional info on the test benches (even a link) would be greatly appreciated. Nelson. _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
