On 30.07.2015 02:10, Wunsch, Felix (CEL) wrote: > Hi, > > thanks for offering this tutorial! > > This may sound like a dumb question: Do I have to know how to write > Verilog code to be able to participate? I think I have a solid GNU Radio > background with Python and C++ but I'm a total newbie to FPGA programming.
Not a dumb question at all. The short answer is yes, you will need some FPGA skills, but that doesn't mean you can't participate in this tutorial if you've never done FPGA development before. Here's the long answer: If you're just getting into FPGA development and SDR, RFNoC is a *much* nicer place to start than 'raw FPGA development'. Also, just looking at raw Verilog, this is a bit simpler than you might think. I challenge you to have a look at this file: https://github.com/EttusResearch/fpga/blob/rfnoc-devel/usrp3/lib/rfnoc/cadd.v . It's a complex adder, including handshaking and everything. Can you guess what it's doing? One thing I will add though: All participants will need to install a working version of Vivado on their laptops *before* the tutorials. Ideally, we'd hand out USB drives to all, but Vivado isn't free software so we're out of options here. (The free webpack version will work, though! No need to buy a license.) *I will send out detailed instructions to all participants with enough time to get prepared.* For the experts among you: If you can build images on rfnoc-devel, you're already good to go. If you don't know what that means, that's fine too, just wait for my update! Cheers, Martin _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org https://lists.gnu.org/mailman/listinfo/discuss-gnuradio
