On Mar 15, 2012, at 3:31 PM, Bob Friesenhahn wrote:
> Is someone working on adding AVX instruction support to Illumos as described
> at "https://www.illumos.org/issues/533";?
I will be beginning to work on some of this -- in particular there are new
algorithms from Intel which make use of those instructions, which we will want
to enable. Stay tuned.
>
> The recent Intel and AMD CPUs support AVX (256 bit math) instructions. Use of
> AVX instructions can provide a large boost over SSE2+ in performance (e.g.
> over 2x). Without support for it in the OS (at least register preservation
> across context switches), it is impossible to use AVX instructions, even if
> the compiler supports it (GCC 4.6 somewhat supports it, with 4.7 being much
> better).
>
> This bug is currently marked with "low" status but given that AVX is a major
> new feature of CPUs currently available (e.g. Intel "Core 2 + AVX", Intel
> "Sandy Bridge", and AMD "Bulldozer"), it seems like the bug should be given
> increased priority.
Yes, I agree.
- Garrett
>
> Bob
> --
> Bob Friesenhahn
> [email protected], http://www.simplesystems.org/users/bfriesen/
> GraphicsMagick Maintainer, http://www.GraphicsMagick.org/
>
>
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