On Mon, 11 Jun 2001, Karl Lessard wrote: > Are you using the HALlib? It takes care of a lot of synchronisation > issues after the dac initialisation in those 2 files. About the options, > I've never seen that in our driver. What it supposed to do? > Hi, I'm not using the hallib. And I apologise - I did eventually find where the sync polarity for the first head is set (in the vgahw stuff). My problem turned out to be nothing to do with sync polarity. I already said that dot clocks <16MHz lock my box. It also turns out that the clocking isn't stable below around 20MHz (18MHz and I get a picture, but very flickery). My current workaround is to make my mode 1440x576 - that way I can use a 27MHz dot clock. Downside is that the pixels are very non-square so most X output is squashed up due to assumptions that the pixels are square. Do you know how low a G200 dotclock can go? I've also got one of those in another machine and could use it. Thanks, Steve > Karl > > > > Stephen Davies wrote: > > >Hi, > > > >Does the mga driver support the -HSync -VSync options? > > > >If I compare mga_dac3026.c and mga_dacG.c, I see the former does some > >stuff to the RAMDAC to set sync polarity, but I don't see any of that in > >the latter. > > > >I'm trying to output PAL-rate interlaced video. But my TV won't > >sync. Don't have a scope, but I'm pretty sure my modeline is right. > > > >Incidentally, I notice that attempts to set the dot clock on CRTC1 lower > >than 16MHz locks my machine. > > > >Thanks and regards, > >Steve > >(Sorry: not yet subscribed to the list) > > > > > > > >_______________________________________________ > >Dri-devel mailing list > >[EMAIL PROTECTED] > >http://lists.sourceforge.net/lists/listinfo/dri-devel > > > > > > > > _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] http://lists.sourceforge.net/lists/listinfo/dri-devel
