Thomas Hellström wrote:
I want a DRI client to flip a video frame to screen, using a hardware entity called the HQV. This is a rather time critical operation. To do this I have to take the hardware lock.
While this is happening, another thread is waiting for the mpeg decoder to complete a frame. To to that, this thread needs to take the hardware lock, wait for quiescent DMA, and then wait for the mpeg decoder to signal idle. It might be that the DMA command queue does not even contain mpeg data. This waiting delays the frame flip enough to create a visible jump in the video.
With multiple locks:
The first thread checks the HQV lock, it is available and frame flipping is done immediately.
The other thread meanwhile takes the MPEG engine lock, waits until the DMA engine has processed all MPEG commands in the command queue and then waits for the MPEG engine to be idle. DMA might still be processing 3D commands.
This sounds conceptually similar to waiting for the vertical retrace.
It sounds like what you really want is an ioctl to wait for the MPEG engine to complete and acquire the lock. Is it possible to have the engine generate an interrupt when it's done with a certain frame? If so, you could have the hardware do that, and have the ioctl make the process sleep until the interrpt arrives. At that point acquire the existing heavy-weight lock and return.
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