> > My understanding is that AGP only does transfers system RAM -> video RAM
> > and all transfers in the opposite direction have to use plain PCI 
> > transfers at least as far as the bus is concerned.
> 
> You mean system RAM -> graphics card, right? Does this mean that the 
> graphics card cannot always write into memory that falls within 
> RADEON_MC_AGP_LOCATION?

Actually, that depends on the chipset. Some chipsets do support it, some
don't. I don't think this capability is currently exposed by our AGP
infrastructure.

> > It could be anything. However, the recommended way to program the memory 
> > controller is to set the BASE of video memory to its physical PCI address 
> > and to put AGP memory where it is mirrored by the AGP GART, as, 
> > presumably, this does not overlap with system RAM or any of other 
> > sensitive areas.
> > 
> > My understanding is that dev->agp->base is the address where the AGP GART 
> > mirrors the pieces of system RAM comprising AGP space.
>
> Yes, that's my understanding, too. But what is the Radeon's business knowing 
> that address? Why does it need to know this address? I thought this was CPU 
> address space, not card address space.

No, the AGP aperture base is known to the radeon since the AGP cycles
issued by the radeon must "land" in the proper area. However, it's
programmed once for all in the card.

But it can't be set to the same value as the "CPU" view of it neither.
The reason is that there may not be any valid "CPU" view of it. On some
chipsets, the AGP aperture is not accessible at all by the CPU. On those
platforms, the aperture is made visible by remapping all pages that are
bound to it into a single linear virtual mapping (using the MMU), not by
mapping in the physical AGP aperture. In fact, on some chipsets, the AGP
base has to be 0 (without however conflicting with PCI accesses as these
chipsets, afaik, only go through the GART for pure AGP transactions).

Ben.




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