> My understanding of bus operation is that it's sole function is to > provide memory mapped IO, IO ports, and interrupt control, after these > features are configured -- by the BIOS -- software only has to worry > about the device at the other end... After this initial configuration, > so I thought, the bus was invisible and mostly irrelevant...
You need to get a better understanding of bus operation... if all you want to do with an AGP card is use it as a basic PCI card you might be in the ballpark, but AGP does a lot more than simple PCI so the X server needs to configure it (faster speeds, special write cycles, etc..) > >From the trafic on this list it seems that not only are there > performance considerations but vital operational charactoristics of > these busses that require software support. Can someone please explain > this to me? Also with AGP you have a thing called a GART, which is built into your chipset, with non-AGP (PCI/PCIe) this isn't available, and manufacturers put them on the GPU, these need to be configured by the drivers to enable accelerated operations, however currently ATI have only provided information for their PCI GART, their PCIE GART is undocumented as of yet (beyond basic register information - which is probably enough, I just need to write more test code..) Dave. -- David Airlie, Software Engineer http://www.skynet.ie/~airlied / airlied at skynet.ie Linux kernel - DRI, VAX / pam_smb / ILUG ------------------------------------------------------- SF.Net email is Sponsored by the Better Software Conference & EXPO September 19-22, 2005 * San Francisco, CA * Development Lifecycle Practices Agile & Plan-Driven Development * Managing Projects & Teams * Testing & QA Security * Process Improvement & Measurement * http://www.sqe.com/bsce5sf -- _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/dri-devel
