Michel Dänzer wrote:
On Tue, 2006-05-30 at 02:42 +0200, Roland Scheidegger wrote:
Looks like quite some more work is needed to detect real lockups but not just randomly reseting the chip when there is none (which can itself lead to lockups IME).

Maybe, or maybe it's just a matter of sticking RADEONCP_STOP()s in the
right places, ala https://bugs.freedesktop.org/show_bug.cgi?id=1889 .
Since the box is down, I assume this only refers to the lockups which can be caused by reseting the engine? In any case, I can't see a good reason why you'd want to reset the chip when it has, in fact, not locked up. I've done some quick test hack (attached) which did fix the problem with gltestperf for me (system was really unresponsive during the benchmark, though), together with that EBUSY fix. Apparently, on my box, the FIFO wait time is probably a bit short (roughly 0.7 seconds), maybe something with a real timebase should be used rather than just 2 million INREGS? For determining if the chip has locked up I just used the ZPASS_DATA reg (assuming that as long as the chip outputs fragments it has not locked up - of course you could hack up some gl test program where all fragments fail the z test, but I'm not sure there's a better reg to monitor activity - ring ptr might be another possibility, but I think this can point at the same location for a long time too (for instance when drawing using the idx buf command).

Roland
Index: src/radeon_accel.c
===================================================================
RCS file: /cvs/xorg/driver/xf86-video-ati/src/radeon_accel.c,v
retrieving revision 1.24
diff -u -r1.24 radeon_accel.c
--- src/radeon_accel.c  22 Mar 2006 22:30:14 -0000      1.24
+++ src/radeon_accel.c  30 May 2006 12:21:21 -0000
@@ -94,7 +94,7 @@
 
                                /* X and server generic header files */
 #include "xf86.h"
-
+#include <sys/time.h>
 
 static struct {
     int rop;
@@ -128,7 +128,12 @@
     int            i;
 
     for (;;) {
+       struct timeval tv1, tv2;
+       unsigned int zcount1, zcount2;
+       gettimeofday(&tv1, NULL);
+       zcount1 = INREG(0x3290);
        for (i = 0; i < RADEON_TIMEOUT; i++) {
+       /* XXX should wait for fixed time maybe? */
            info->fifo_slots =
                INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK;
            if (info->fifo_slots >= entries) return;
@@ -136,6 +141,16 @@
        RADEONTRACE(("FIFO timed out: %d entries, stat=0x%08x\n",
                     INREG(RADEON_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK,
                     INREG(RADEON_RBBM_STATUS)));
+       gettimeofday(&tv2, NULL);
+       zcount2 = INREG(0x3290);
+       xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+               "waited for %d seconds %d usecs\n",
+               tv2.tv_sec - tv1.tv_sec, tv2.tv_usec - tv1.tv_usec);
+       if (zcount1 != zcount2) {
+               xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                  "engine still busy not locked up\n");
+               continue;
+       }
        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                   "FIFO timed out, resetting engine...\n");
        RADEONEngineReset(pScrn);
--
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