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https://bugs.freedesktop.org/show_bug.cgi?id=7697
[EMAIL PROTECTED] changed:
What |Removed |Added
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CC| |[EMAIL PROTECTED]
------- Additional Comments From [EMAIL PROTECTED] 2006-10-15 10:21 -------
This looks like you're essentially reducing the function to
return 0;
and thus narrowing down GART boundary checking. I doubt this is the right
solution, I rather suppose that gart_vm_start and gart_size are not set
correctly for PCIE cards.
I'm also having issues with a Xegl / radeon mobility M300 setup (i.e.
R300/CHIP_RV380). I'm trying to understand the DRM code and it actually looks
like some of the code assumes that the GART is right behind the framebuffer, but
it might be hard under some circumstances to get the actual FB size (cf.
http://lists.freedesktop.org/archives/xorg/2005-May/007671.html). For instance,
the kernel seems to limit the VRAM to MAX_VRAM_SIZE, and I fear that the GART
position might be located somewhere inside this VRAM.
It would also be interesting to load the drm module with "debug=1" and check
whether the
dmesg | grep "Setting GART location based on old memory map"
shell command returns a matching line.
For me, together with another modification, forcing dev_priv->new_memmap in
radeon_drv.c to 1 I got my PCIE card beyond a segfault and made it display
"vertical stripes", which seems to be a well-known radeonfb issue. It's quite
hard to determine whether bogus microcode is involved or not, and not many
experts seems to be available for the radeon driver.
For instance, I've spent roughly 15 hours on this issue and found no valuable
documentation explaining the detailed design desicions for FB implementations
and radeonFB layout. I'm CCing Dave Airlie because I still don't understand the
whole code.
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