http://bugs.freedesktop.org/show_bug.cgi?id=9871





------- Comment #8 from [EMAIL PROTECTED]  2007-07-20 23:26 PST -------
I looked at the dumps some more, and I think that 0x221c (previously an unknown
register) is the clip control register. The first 6 bits seem to be the enable
bit for each clip plane.  Previously we thought this register had to be 0x0 for
normal rendering and 0x0001C000 for buffer clears; so maybe there is some
weirdness with this clip register and buffer clears... but it's main purpose
seems to be clip control not some kind of rendering mode control. 


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