On Fri, Feb 29, 2008 at 3:14 PM, seventh guardian <[EMAIL PROTECTED]> wrote: > On Fri, Feb 29, 2008 at 3:03 PM, Thomas Hellström > <[EMAIL PROTECTED]> wrote: > > Hi. > > > > I've pushed the intel-post-reloc branch with the following stuff: > > > > 1) Full backwards compatibility. > > 2) A new reloc type 1, which is applied _after_ all validations and with > > slightly different format. > > 3) If the buffer is idle, type 1 relocations are performed using the new > > kmap_atomic_prot_pfn if it's available. > > 4) If the buffer is busy, It's never mapped, and relocations are > > performed using a single dword 2D blit, and we never have to idle the > > buffer. This comes at a cost of an additional single MI_FLUSH after all > > blit-relocations have been performed. > > > > This could help avoid pre-validation relocation processing, race > > conditions due to the relocatee not being on the unfenced list when > > relocs are applied and unnecessary buffer idling. > > I can confirm that x86-64 compilation is fixed. Thanks! Sorry, wrong topic..
> Cheers, > Renato Caldas > ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ -- _______________________________________________ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
