Here are a few drm patches.
correct another lock leak.
add missing link.
negate return value. minor cleanup while we are here.
diff --git a/bsd-core/drm_bufs.c b/bsd-core/drm_bufs.c
index 3508331..c793634 100644
--- a/bsd-core/drm_bufs.c
+++ b/bsd-core/drm_bufs.c
@@ -832,12 +832,12 @@ int drm_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
if (request->count < 0 || request->count > 4096)
return EINVAL;
- DRM_SPINLOCK(&dev->dma_lock);
-
order = drm_order(request->size);
if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
return EINVAL;
+ DRM_SPINLOCK(&dev->dma_lock);
+
/* No more allocations after first buffer-using ioctl. */
if (dev->buf_use != 0) {
DRM_SPINUNLOCK(&dev->dma_lock);
diff --git a/bsd-core/radeon_microcode.h b/bsd-core/radeon_microcode.h
new file mode 120000
index 0000000..709fff3
--- /dev/null
+++ b/bsd-core/radeon_microcode.h
@@ -0,0 +1 @@
+../shared-core/radeon_microcode.h
\ No newline at end of file
diff --git a/shared-core/radeon_irq.c b/shared-core/radeon_irq.c
index d21761f..0844c0b 100644
--- a/shared-core/radeon_irq.c
+++ b/shared-core/radeon_irq.c
@@ -74,7 +74,7 @@ int radeon_enable_vblank(struct drm_device *dev, int crtc)
default:
DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
crtc);
- return EINVAL;
+ return -EINVAL;
}
} else {
switch (crtc) {
@@ -87,7 +87,7 @@ int radeon_enable_vblank(struct drm_device *dev, int crtc)
default:
DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
crtc);
- return EINVAL;
+ return -EINVAL;
}
}
@@ -279,9 +279,8 @@ u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc)
} else if (crtc == 1) {
crtc_cnt_reg = RADEON_CRTC2_CRNT_FRAME;
crtc_status_reg = RADEON_CRTC2_STATUS;
- } else {
+ } else
return -EINVAL;
- }
return RADEON_READ(crtc_cnt_reg) + (RADEON_READ(crtc_status_reg) & 1);
}
}
@@ -372,9 +371,9 @@ void radeon_driver_irq_uninstall(struct drm_device * dev)
dev_priv->irq_enabled = 0;
+ /* Disable *all* interrupts */
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
- /* Disable *all* interrupts */
RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
}
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