Patch's against drm git master. Thanks.
Signed-off-by: Zhenyu Wang <[EMAIL PROTECTED]>
---
drm_pciids.txt | 3 +++
i915_drv.h | 11 +++++++++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/shared-core/drm_pciids.txt b/shared-core/drm_pciids.txt
index f48258a..4e2cfb0 100644
--- a/shared-core/drm_pciids.txt
+++ b/shared-core/drm_pciids.txt
@@ -395,6 +395,9 @@
0x8086 0x29B2 CHIP_I9XX|CHIP_I915 "Intel Q35"
0x8086 0x29D2 CHIP_I9XX|CHIP_I915 "Intel Q33"
0x8086 0x2A42 CHIP_I9XX|CHIP_I965 "Intel Integrated Graphics Device"
+0x8086 0x2E02 CHIP_I9XX|CHIP_I965 "Intel Integrated Graphics Device"
+0x8086 0x2E12 CHIP_I9XX|CHIP_I965 "Intel Q45/Q43"
+0x8086 0x2E22 CHIP_I9XX|CHIP_I965 "Intel G45/G43"
[imagine]
0x105d 0x2309 IMAGINE_128 "Imagine 128"
diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h
index 427c49f..32e90d2 100644
--- a/shared-core/i915_drv.h
+++ b/shared-core/i915_drv.h
@@ -1293,12 +1293,19 @@ extern int i915_wait_ring(struct drm_device * dev, int
n, const char *caller);
(dev)->pci_device == 0x29A2 || \
(dev)->pci_device == 0x2A02 || \
(dev)->pci_device == 0x2A12 || \
- (dev)->pci_device == 0x2A42)
+ (dev)->pci_device == 0x2A42 || \
+ (dev)->pci_device == 0x2E02 || \
+ (dev)->pci_device == 0x2E12 || \
+ (dev)->pci_device == 0x2E22)
#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
#define IS_IGD_GM(dev) ((dev)->pci_device == 0x2A42)
+#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
+ (dev)->pci_device == 0x2E12 || \
+ (dev)->pci_device == 0x2E22)
+
#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
(dev)->pci_device == 0x29B2 || \
(dev)->pci_device == 0x29D2)
@@ -1309,7 +1316,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n,
const char *caller);
#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
IS_I945GM(dev) || IS_I965GM(dev) || IS_IGD_GM(dev))
-#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_IGD_GM(dev))
+#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_IGD_GM(dev) || IS_G4X(dev))
#define PRIMARY_RINGBUFFER_SIZE (128*1024)
--
Open Source Technology Center, Intel ltd.
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