Michel, can you take a look at this?  vblank wait is working really well for 
me with the latest bits, but I found what I think is a page flip related bug 
on 965.  I've been testing with the attached pre- & post-modeset ioctl patch 
to the 2D driver.  Changing modes, adding & removing outputs and moving a 
window waiting on vblank events all seem solid & tear free on my 965 (though 
on 915 we may still have some tearing due to the way interrupts work on that 
chip, still have to test & fix if necessary).

What do you think?

Thanks,
Jesse
diff --git a/src/i830_display.c b/src/i830_display.c
index 56a718d..67c9cce 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -35,6 +35,7 @@
 #include <assert.h>
 #include <stdlib.h>
 #include <math.h>
+#include <sys/ioctl.h>
 
 #include "xf86.h"
 #include "i830.h"
@@ -730,6 +731,39 @@ i830_use_fb_compression(xf86CrtcPtr crtc)
     return TRUE;
 }
 
+#if defined(DRM_IOCTL_MODESET_CTL) && defined(XF86DRI)
+static void i830_modeset_ctl(xf86CrtcPtr crtc, int pre)
+{
+    ScrnInfoPtr pScrn = crtc->scrn;
+    I830Ptr pI830 = I830PTR(pScrn);
+    I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+    struct drm_modeset_ctl modeset;
+
+    modeset.crtc = intel_crtc->plane;
+
+    /*
+     * DPMS will be called many times (especially off), but we only
+     * want to catch the transition from on->off and off->on.
+     */
+    if (pre && intel_crtc->dpms_mode != DPMSModeOff) {
+	/* On -> off is a pre modeset */
+	modeset.cmd = _DRM_PRE_MODESET;
+	ioctl(pI830->drmSubFD, DRM_IOCTL_MODESET_CTL, &modeset);
+	ErrorF("modeset: on -> off on plane %d\n", modeset.crtc);
+    } else if (!pre && intel_crtc->dpms_mode == DPMSModeOff) {
+	/* Off -> on means post modeset */
+	modeset.cmd = _DRM_POST_MODESET;
+	ioctl(pI830->drmSubFD, DRM_IOCTL_MODESET_CTL, &modeset);
+	ErrorF("modeset: off -> on on plane %d\n", modeset.crtc);
+    }
+}
+#else
+static void i830_modeset_ctl(xf86CrtcPtr crtc, int dpms_state)
+{
+    return;
+}
+#endif /* DRM_IOCTL_MODESET_CTL && XF86DRI */
+
 /**
  * Sets the power management mode of the pipe and plane.
  *
@@ -797,8 +831,10 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
 	/* Reenable compression if needed */
 	if (i830_use_fb_compression(crtc))
 	    i830_enable_fb_compression(crtc);
+	i830_modeset_ctl(crtc, 0);
 	break;
     case DPMSModeOff:
+	i830_modeset_ctl(crtc, 1);
 	/* Shut off compression if in use */
 	if (i830_use_fb_compression(crtc))
 	    i830_disable_fb_compression(crtc);
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 80e2111..58391b2 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -960,7 +960,7 @@ void LOCK_HARDWARE( struct intel_context *intel )
 				    intel_fb->Base._ColorDrawBufferIndexes[0]);
     }
 
-    if (intel_rb && dPriv->vblFlags &&
+    if (intel_rb && intel_fb->pf_num_pages && dPriv->vblFlags &&
 	!(dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) &&
 	(intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) {
 	drmVBlank vbl;
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