Hello Sirs:
The following patch is based on 2.6.31 mainline kernel for the system hang
issue caused by 3D scaling + ACPI. The modified header files includes
1. via_3d_reg.h
2. via_drv.h
3. via_verifier.h
4. via_drm.h
Signed-off-by: Bruce Chang<brucech...@via.com.tw>
diff -ruN old/drivers/gpu/drm/via/via_3d_reg.h
new/drivers/gpu/drm/via/via_3d_reg.h
--- old/drivers/gpu/drm/via/via_3d_reg.h 2009-07-14 16:42:05.000000000
+0800
+++ new/drivers/gpu/drm/via/via_3d_reg.h 2009-07-14 16:45:28.000000000
+0800
@@ -1647,4 +1647,7 @@
#define VIA_VIDEO_HEADER6 0xFE050000
#define VIA_VIDEO_HEADER7 0xFE060000
#define VIA_VIDEOMASK 0xFFFF0000
+#define HALCYON_HEADER3 0xF4000000
+#define HALCYON_HEADER4 0xF6000000
+#define HALCYON_HEADER_MASK 0xFE000000
#endif
diff -ruN old/drivers/gpu/drm/via/via_drv.h new/drivers/gpu/drm/via/via_drv.h
--- old/drivers/gpu/drm/via/via_drv.h 2009-07-14 16:42:05.000000000 +0800
+++ new/drivers/gpu/drm/via/via_drv.h 2009-07-14 16:45:28.000000000 +0800
@@ -62,6 +62,7 @@
drm_local_map_t *sarea;
drm_local_map_t *fb;
drm_local_map_t *mmio;
+ enum drm_agp_type agptype;
unsigned long agpAddr;
wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
char *dma_ptr;
@@ -94,7 +95,13 @@
unsigned long vram_offset;
unsigned long agp_offset;
drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
+ struct drm_local_map video_agp_address_map[3];
+ enum {
+ CR_FOR_RINGBUFFER,
+ CR_FOR_VIDEO
+ } cr_status;
uint32_t dma_diff;
+ int initialize;
} drm_via_private_t;
enum via_family {
@@ -120,6 +127,8 @@
extern int via_agp_init(struct drm_device *dev, void *data, struct drm_file
*file_priv);
extern int via_map_init(struct drm_device *dev, void *data, struct drm_file
*file_priv);
extern int via_decoder_futex(struct drm_device *dev, void *data, struct
drm_file *file_priv);
+extern int via_get_drm_info(struct drm_device *dev, void *data,
+ struct drm_file *file_priv);
extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file
*file_priv);
extern int via_dma_blit_sync( struct drm_device *dev, void *data, struct
drm_file *file_priv );
extern int via_dma_blit( struct drm_device *dev, void *data, struct drm_file
*file_priv );
@@ -154,4 +163,7 @@
extern void via_dmablit_handler(struct drm_device *dev, int engine, int
from_irq);
extern void via_init_dmablit(struct drm_device *dev);
+extern int via_drm_resume(struct pci_dev *dev);
+extern int via_drm_suspend(struct pci_dev *dev, pm_message_t state);
+
#endif
diff -ruN old/drivers/gpu/drm/via/via_verifier.h
new/drivers/gpu/drm/via/via_verifier.h
--- old/drivers/gpu/drm/via/via_verifier.h 2009-07-14 16:42:05.000000000
+0800
+++ new/drivers/gpu/drm/via/via_verifier.h 2009-07-14 16:45:28.000000000
+0800
@@ -25,7 +25,7 @@
#ifndef _VIA_VERIFIER_H_
#define _VIA_VERIFIER_H_
-
+#include "via_3d_reg.h"
typedef enum {
no_sequence = 0,
z_address,
@@ -59,4 +59,26 @@
extern int via_parse_command_stream(struct drm_device *dev, const uint32_t
*buf,
unsigned int size);
+static inline int is_agp_header(unsigned int data)
+{
+ if (data == HALCYON_HEADER2)
+ return 1;
+ else if ((data & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5)
+ ;
+ else if ((data & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6)
+ ;
+ else if (data & HALCYON_HEADER_MASK) {
+ switch (data & HALCYON_HEADER_MASK) {
+ case HALCYON_HEADER3:
+ case HALCYON_HEADER4:
+ case HALCYON_HEADER1:
+ return 1;
+ default:
+ return 0;
+ }
+ } else
+ return 0;
+
+ return 1;
+}
#endif
diff -ruN old/include/drm/via_drm.h new/include/drm/via_drm.h
--- old/include/drm/via_drm.h 2009-07-14 16:42:05.000000000 +0800
+++ new/include/drm/via_drm.h 2009-07-14 16:44:22.000000000 +0800
@@ -24,8 +24,6 @@
#ifndef _VIA_DRM_H_
#define _VIA_DRM_H_
-#include <linux/types.h>
-
/* WARNING: These defines must be the same as what the Xserver uses.
* if you change them, you must change the defines in the Xserver.
*/
@@ -53,6 +51,12 @@
#define VIA_LOG_MIN_TEX_REGION_SIZE 16
#endif
+struct drm_via_info {
+ unsigned long AgpHandle;
+ unsigned long AgpSize;
+ unsigned long RegHandle;
+ unsigned long RegSize;
+} ;
#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
#define VIA_UPLOAD_CTX 0x4
@@ -69,7 +73,7 @@
#define DRM_VIA_FB_INIT 0x03
#define DRM_VIA_MAP_INIT 0x04
#define DRM_VIA_DEC_FUTEX 0x05
-#define NOT_USED
+#define DRM_VIA_GET_INFO 0x06
#define DRM_VIA_DMA_INIT 0x07
#define DRM_VIA_CMDBUFFER 0x08
#define DRM_VIA_FLUSH 0x09
@@ -79,6 +83,9 @@
#define DRM_VIA_WAIT_IRQ 0x0d
#define DRM_VIA_DMA_BLIT 0x0e
#define DRM_VIA_BLIT_SYNC 0x0f
+#define DRM_VIA_AUTH_MAGIC 0x11
+#define DRM_VIA_FLUSH_VIDEO 0x12
+#define DRM_VIA_INIT_JUDGE 0x16
#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM,
drm_via_mem_t)
#define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM,
drm_via_mem_t)
@@ -86,6 +93,8 @@
#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT,
drm_via_fb_t)
#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT,
drm_via_init_t)
#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE +
DRM_VIA_DEC_FUTEX, drm_via_futex_t)
+#define DRM_IOCTL_VIA_GET_INFO DRM_IOR(DRM_COMMAND_BASE + \
+ DRM_VIA_GET_INFO, struct drm_via_info)
#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT,
drm_via_dma_init_t)
#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE +
DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
#define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
@@ -93,8 +102,14 @@
#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE +
DRM_VIA_CMDBUF_SIZE, \
drm_via_cmdbuf_size_t)
#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE +
DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
+#define DRM_IOCTL_VIA_FLUSH_VIDEO DRM_IOW(DRM_COMMAND_BASE + \
+ DRM_VIA_FLUSH_VIDEO, struct drm_via_video_agp_cmd)
#define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT,
drm_via_dmablit_t)
#define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE +
DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
+#define DRM_IOCTL_VIA_AUTH_MAGIC DRM_IOW(DRM_COMMAND_BASE + \
+ DRM_VIA_AUTH_MAGIC, drm_auth_t)
+#define DRM_IOCTL_VIA_INIT_JUDGE DRM_IOR(DRM_COMMAND_BASE + \
+ DRM_VIA_INIT_JUDGE, int)
/* Indices into buf.Setup where various bits of state are mirrored per
* context and per buffer. These can be fired at the card as a unit,
@@ -114,21 +129,28 @@
#define VIA_MEM_SYSTEM 2
#define VIA_MEM_MIXED 3
#define VIA_MEM_UNKNOWN 4
+#define VIA_MEM_VIDEO_SAVE 2 /*For video memory need to be saved in ACPI
*/
+
+enum drm_agp_type {
+ AGP_RING_BUFFER,
+ AGP_DOUBLE_BUFFER,
+ DISABLED
+};
typedef struct {
- __u32 offset;
- __u32 size;
+ uint32_t offset;
+ uint32_t size;
} drm_via_agp_t;
typedef struct {
- __u32 offset;
- __u32 size;
+ uint32_t offset;
+ uint32_t size;
} drm_via_fb_t;
typedef struct {
- __u32 context;
- __u32 type;
- __u32 size;
+ uint32_t context;
+ uint32_t type;
+ uint32_t size;
unsigned long index;
unsigned long offset;
} drm_via_mem_t;
@@ -143,6 +165,8 @@
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long agpAddr;
+ unsigned long agp_offset;
+ enum drm_agp_type agp_type;
} drm_via_init_t;
typedef struct _drm_via_futex {
@@ -150,9 +174,9 @@
VIA_FUTEX_WAIT = 0x00,
VIA_FUTEX_WAKE = 0X01
} func;
- __u32 ms;
- __u32 lock;
- __u32 val;
+ uint32_t ms;
+ uint32_t lock;
+ uint32_t val;
} drm_via_futex_t;
typedef struct _drm_via_dma_init {
@@ -213,7 +237,7 @@
VIA_CMDBUF_LAG = 0x02
} func;
int wait;
- __u32 size;
+ uint32_t size;
} drm_via_cmdbuf_size_t;
typedef enum {
@@ -238,8 +262,8 @@
struct drm_via_wait_irq_request {
unsigned irq;
via_irq_seq_type_t type;
- __u32 sequence;
- __u32 signal;
+ uint32_t sequence;
+ uint32_t signal;
};
typedef union drm_via_irqwait {
@@ -247,8 +271,14 @@
struct drm_wait_vblank_reply reply;
} drm_via_irqwait_t;
+struct drm_via_video_agp_cmd {
+ u32 offset;
+ u32 cmd_size;
+ u32 buffer_size;
+} ;
+
typedef struct drm_via_blitsync {
- __u32 sync_handle;
+ uint32_t sync_handle;
unsigned engine;
} drm_via_blitsync_t;
@@ -259,19 +289,28 @@
*/
typedef struct drm_via_dmablit {
- __u32 num_lines;
- __u32 line_length;
+ uint32_t num_lines;
+ uint32_t line_length;
- __u32 fb_addr;
- __u32 fb_stride;
+ uint32_t fb_addr;
+ uint32_t fb_stride;
unsigned char *mem_addr;
- __u32 mem_stride;
+ uint32_t mem_stride;
- __u32 flags;
+ uint32_t flags;
int to_fb;
drm_via_blitsync_t sync;
} drm_via_dmablit_t;
+struct drm_via_video_save_head {
+ void *pvideomem;
+ void *psystemmem;
+ int size;
+ /* token used to identify this video memory */
+ unsigned long token;
+ void *next;
+} ;
+extern struct drm_via_video_save_head *via_video_save_head;
#endif /* _VIA_DRM_H_ */
Thanks and Best Regards
=================================================
Bruce C. Chang(張祖明)
VIA Technologies, Inc.
Address: 1F, 531, Chung-Cheng Road, Hsin-Tien, 231 Taipei
Tel: +886-2-22185452 Ext 7323
Mobile: +886-968343824
Fax: +886-2-22186282
Skype: Bruce.C.Chang
Email: brucech...@via.com.tw
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