On Tue, 2010-01-05 at 11:25 +0800, Zhenyu Wang wrote:
> This enables possible 36bit address mask on 965G that use physical
> address for hw status page.
> Signed-off-by: Zhenyu Wang <zhen...@linux.intel.com>
> ---
> drivers/char/agp/intel-agp.c | 6 +++++-
> drivers/gpu/drm/i915/i915_dma.c | 4 ++++
> 2 files changed, 9 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
> index 30c36ac..3999a5f 100644
> --- a/drivers/char/agp/intel-agp.c
> +++ b/drivers/char/agp/intel-agp.c
> @@ -2460,10 +2460,14 @@ static int __devinit agp_intel_probe(struct pci_dev
> *pdev,
> &bridge->mode);
> }
>
> - if (bridge->driver->mask_memory == intel_i965_mask_memory)
> + if (bridge->driver->mask_memory == intel_i965_mask_memory) {
> if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
> dev_err(&intel_private.pcidev->dev,
> "set gfx device dma mask 36bit failed!\n");
> + else
> + pci_set_consistent_dma_mask(intel_private.pcidev,
> + DMA_BIT_MASK(36));
> + }
It seems that both pci_set_dma_mask/set_consistent_dma_mask will be
called when the DMA mask is set correctly.
Can we use the following format so that it is easy to understand?
if (!pci_set_dma_mask() && !pci_set_consistent_dma_mask()) {
success;
} else
failure;
Do we need to add the explicit DMA mask for using 32bit DMA mask?
>
> pci_set_drvdata(pdev, bridge);
> return agp_add_bridge(bridge);
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 02607ed..750f6c8 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -134,6 +134,10 @@ static int i915_init_phys_hws(struct drm_device *dev)
>
> memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
>
> + if (IS_I965G(dev))
> + dev_priv->dma_status_page |= (dev_priv->dma_status_page >> 28) &
> + 0xf0;
> +
> I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
> DRM_DEBUG_DRIVER("Enabled hardware status page\n");
> return 0;
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