On Thu, Feb 04, 2010 at 03:42:26AM +0200, Pauli Nieminen wrote:
> Cache flush is required in case CPU is accessing rendered data.
>
> This fixes glean/readPixSanity test case and random rendering
> errors in sauerbraten.
Doing this flush are ok, couple of patch style comment below.
Reviewed-by: Jerome Glisse <jgli...@redhat.com>
>
> Signed-off-by: Pauli Nieminen <suok...@gmail.com>
> ---
> drivers/gpu/drm/radeon/r100.c | 6 ++++++
> drivers/gpu/drm/radeon/radeon_reg.h | 2 ++
> 2 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
> index 11c9a3f..6f4f7ea 100644
> --- a/drivers/gpu/drm/radeon/r100.c
> +++ b/drivers/gpu/drm/radeon/r100.c
> @@ -357,6 +357,12 @@ u32 r100_get_vblank_counter(struct radeon_device *rdev,
> int crtc)
> void r100_fence_ring_emit(struct radeon_device *rdev,
> struct radeon_fence *fence)
> {
> + /* We have to make sure that caches are flushed before
> + * CPU might read something from VRAM. */
> + radeon_ring_write(rdev, PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0));
> + radeon_ring_write(rdev, RADEON_RB3D_DC_FLUSH_ALL);
> + radeon_ring_write(rdev, PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0));
> + radeon_ring_write(rdev, RADEON_RB3D_ZC_FLUSH_ALL);
Move it below the following comment
> /* Who ever call radeon_fence_emit should call ring_lock and ask
> * for enough space (today caller are ib schedule and buffer move) */
> /* Wait until IDLE & CLEAN */
> diff --git a/drivers/gpu/drm/radeon/radeon_reg.h
> b/drivers/gpu/drm/radeon/radeon_reg.h
> index 6d0a009..5581dab 100644
> --- a/drivers/gpu/drm/radeon/radeon_reg.h
> +++ b/drivers/gpu/drm/radeon/radeon_reg.h
> @@ -1578,6 +1578,8 @@
>
> #define RADEON_RB3D_ZCACHE_MODE 0x3250
> #define RADEON_RB3D_ZCACHE_CTLSTAT 0x3254
> +# define RADEON_RB3D_ZC_FLUSH 0x1
> +# define RADEON_RB3D_ZC_FREE 0x4
Useless addition you don't use them.
> # define RADEON_RB3D_ZC_FLUSH_ALL 0x5
> #define RADEON_RB3D_DSTCACHE_MODE 0x3258
> # define RADEON_RB3D_DC_CACHE_ENABLE (0)
> --
> 1.6.3.3
>
>
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