---
drivers/staging/rtl8821ae/base.h | 46 +++++++++++++++++++--------------------
drivers/staging/rtl8821ae/debug.h | 10 ++++-----
drivers/staging/rtl8821ae/efuse.h | 4 ++--
drivers/staging/rtl8821ae/pci.h | 18 +++++++--------
4 files changed, 39 insertions(+), 39 deletions(-)
diff --git a/drivers/staging/rtl8821ae/base.h b/drivers/staging/rtl8821ae/base.h
index 629d14f..5eb2a18 100644
--- a/drivers/staging/rtl8821ae/base.h
+++ b/drivers/staging/rtl8821ae/base.h
@@ -43,7 +43,7 @@ enum ap_peer {
PEER_MARV = 7,
PEER_AIRGO = 9,
PEER_MAX = 10,
-} ;
+};
#define RTL_DUMMY_OFFSET 0
#define RTL_DUMMY_UNIT 8
@@ -51,11 +51,11 @@ enum ap_peer {
#define RTL_TX_DESC_SIZE 32
#define RTL_TX_HEADER_SIZE (RTL_TX_DESC_SIZE + RTL_TX_DUMMY_SIZE)
-#define HT_AMSDU_SIZE_4K 3839
-#define HT_AMSDU_SIZE_8K 7935
+#define HT_AMSDU_SIZE_4K 3839
+#define HT_AMSDU_SIZE_8K 7935
-#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */
-#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */
+#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */
+#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */
#define RTL_RATE_COUNT_LEGACY 12
#define RTL_CHANNEL_COUNT 14
@@ -78,33 +78,33 @@ enum ap_peer {
SET_BITS_TO_LE_2BYTE(_hdr, 8, 1, _val)
#define SET_80211_PS_POLL_AID(_hdr, _val) \
- WRITEEF2BYTE(((u8*)(_hdr))+2, _val)
+ WRITEEF2BYTE(((u8 *)(_hdr))+2, _val)
#define SET_80211_PS_POLL_BSSID(_hdr, _val) \
- CP_MACADDR(((u8*)(_hdr))+4, (u8*)(_val))
+ CP_MACADDR(((u8 *)(_hdr))+4, (u8 *)(_val))
#define SET_80211_PS_POLL_TA(_hdr, _val) \
- CP_MACADDR(((u8*)(_hdr))+10, (u8*)(_val))
+ CP_MACADDR(((u8 *)(_hdr))+10, (u8 *)(_val))
#define SET_80211_HDR_DURATION(_hdr, _val) \
- WRITEEF2BYTE((u8*)(_hdr)+FRAME_OFFSET_DURATION, _val)
+ WRITEEF2BYTE((u8 *)(_hdr)+FRAME_OFFSET_DURATION, _val)
#define SET_80211_HDR_ADDRESS1(_hdr, _val) \
- CP_MACADDR((u8*)(_hdr)+FRAME_OFFSET_ADDRESS1, (u8*)(_val))
-#define SET_80211_HDR_ADDRESS2(_hdr, _val) \
- CP_MACADDR((u8*)(_hdr)+FRAME_OFFSET_ADDRESS2, (u8*)(_val))
-#define SET_80211_HDR_ADDRESS3(_hdr, _val) \
- CP_MACADDR((u8*)(_hdr)+FRAME_OFFSET_ADDRESS3, (u8*)(_val))
+ CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS1, (u8 *)(_val))
+#define SET_80211_HDR_ADDRESS2(_hdr, _val) \
+ CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS2, (u8 *)(_val))
+#define SET_80211_HDR_ADDRESS3(_hdr, _val) \
+ CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS3, (u8 *)(_val))
#define SET_80211_HDR_FRAGMENT_SEQUENCE(_hdr, _val) \
- WRITEEF2BYTE((u8*)(_hdr)+FRAME_OFFSET_SEQUENCE, _val)
+ WRITEEF2BYTE((u8 *)(_hdr)+FRAME_OFFSET_SEQUENCE, _val)
-#define SET_BEACON_PROBE_RSP_TIME_STAMP_LOW(__phdr, __val) \
- WRITEEF4BYTE(((u8*)(__phdr)) + 24, __val)
+#define SET_BEACON_PROBE_RSP_TIME_STAMP_LOW(__phdr, __val) \
+ WRITEEF4BYTE(((u8 *)(__phdr)) + 24, __val)
#define SET_BEACON_PROBE_RSP_TIME_STAMP_HIGH(__phdr, __val) \
- WRITEEF4BYTE(((u8*)(__phdr)) + 28, __val)
+ WRITEEF4BYTE(((u8 *)(__phdr)) + 28, __val)
#define SET_BEACON_PROBE_RSP_BEACON_INTERVAL(__phdr, __val) \
- WRITEEF2BYTE(((u8*)(__phdr)) + 32, __val)
-#define GET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr) \
- READEF2BYTE(((u8*)(__phdr)) + 34)
+ WRITEEF2BYTE(((u8 *)(__phdr)) + 32, __val)
+#define GET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr) \
+ READEF2BYTE(((u8 *)(__phdr)) + 34)
#define SET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr, __val) \
- WRITEEF2BYTE(((u8*)(__phdr)) + 34, __val)
+ WRITEEF2BYTE(((u8 *)(__phdr)) + 34, __val)
#define MASK_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr, __val) \
SET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr, \
(GET_BEACON_PROBE_RSP_CAPABILITY_INFO(__phdr) & (~(__val))))
@@ -125,7 +125,7 @@ u8 rtl_is_special_data(struct ieee80211_hw *hw, struct
sk_buff *skb, u8 is_tx);
void rtl_beacon_statistic(struct ieee80211_hw *hw, struct sk_buff *skb);
void rtl_watch_dog_timer_callback(unsigned long data);
int rtl_tx_agg_start(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
- struct ieee80211_sta *sta, u16 tid, u16 * ssn);
+ struct ieee80211_sta *sta, u16 tid, u16 *ssn);
int rtl_tx_agg_stop(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
struct ieee80211_sta *sta, u16 tid);
int rtl_tx_agg_oper(struct ieee80211_hw *hw,
diff --git a/drivers/staging/rtl8821ae/debug.h
b/drivers/staging/rtl8821ae/debug.h
index 5eb6251..fc7be27 100644
--- a/drivers/staging/rtl8821ae/debug.h
+++ b/drivers/staging/rtl8821ae/debug.h
@@ -94,8 +94,8 @@
#define COMP_TXAGC BIT(14) /*For Tx power */
#define COMP_HIPWR BIT(15) /*For High Power Mechanism */
#define COMP_POWER BIT(16) /*For lps/ips/aspm. */
-#define COMP_POWER_TRACKING BIT(17) /*For TX POWER TRACKING */
-#define COMP_BB_POWERSAVING BIT(18)
+#define COMP_POWER_TRACKING BIT(17) /*For TX POWER TRACKING */
+#define COMP_BB_POWERSAVING BIT(18)
#define COMP_SWAS BIT(19) /*For SW Antenna Switch */
#define COMP_RF BIT(20) /*For RF. */
#define COMP_TURBO BIT(21) /*For EDCA TURBO. */
@@ -103,10 +103,10 @@
#define COMP_CMD BIT(23)
#define COMP_EFUSE BIT(24)
#define COMP_QOS BIT(25)
-#define COMP_MAC80211 BIT(26)
+#define COMP_MAC80211 BIT(26)
#define COMP_REGD BIT(27)
#define COMP_CHAN BIT(28)
-#define COMP_EASY_CONCURRENT BIT(29)
+#define COMP_EASY_CONCURRENT BIT(29)
#define COMP_BT_COEXIST BIT(30)
#define COMP_IQK BIT(31)
@@ -203,7 +203,7 @@ enum dbgp_flag_e {
if(unlikely(((_comp) & rtlpriv->dbg.global_debugcomponents ) &&\
(_level <= rtlpriv->dbg.global_debuglevel ))) { \
int __i; \
- u8* ptr = (u8*)_hexdata; \
+ u8 *ptr = (u8 *)_hexdata; \
printk(KERN_DEBUG "%s: ", KBUILD_MODNAME); \
printk(KERN_DEBUG "In process \"%s\" (pid %i):", \
current->comm, \
diff --git a/drivers/staging/rtl8821ae/efuse.h
b/drivers/staging/rtl8821ae/efuse.h
index a9fcbe0..4c71cf5 100644
--- a/drivers/staging/rtl8821ae/efuse.h
+++ b/drivers/staging/rtl8821ae/efuse.h
@@ -117,9 +117,9 @@ extern u8 efuse_read_1byte(struct ieee80211_hw *hw, u16
address);
extern int efuse_one_byte_read(struct ieee80211_hw *hw, u16 addr, u8 *data);
extern void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value);
extern void read_efuse(struct ieee80211_hw *hw, u16 _offset,
- u16 _size_byte, u8 * pbuf);
+ u16 _size_byte, u8 *pbuf);
extern void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
- u16 offset, u32 * value);
+ u16 offset, u32 *value);
extern void efuse_shadow_write(struct ieee80211_hw *hw, u8 type,
u16 offset, u32 value);
extern bool efuse_shadow_update(struct ieee80211_hw *hw);
diff --git a/drivers/staging/rtl8821ae/pci.h b/drivers/staging/rtl8821ae/pci.h
index 9f20655..0c3c39b 100644
--- a/drivers/staging/rtl8821ae/pci.h
+++ b/drivers/staging/rtl8821ae/pci.h
@@ -135,7 +135,7 @@ enum pci_bridge_vendor {
PCI_BRIDGE_VENDOR_AMD, /*0b'0000,0100*/
PCI_BRIDGE_VENDOR_SIS, /*0b'0000,1000*/
PCI_BRIDGE_VENDOR_UNKNOWN, /*0b'0100,0000*/
- PCI_BRIDGE_VENDOR_MAX,
+ PCI_BRIDGE_VENDOR_MAX,
};
struct rtl_pci_capabilities_header {
@@ -143,16 +143,16 @@ struct rtl_pci_capabilities_header {
u8 next;
};
-/* In new TRX flow, Buffer_desc is new concept
+/* In new TRX flow, Buffer_desc is new concept
* But TX wifi info == TX descriptor in old flow
* RX wifi info == RX descriptor in old flow */
struct rtl_tx_buffer_desc {
#if (RTL8192EE_SEG_NUM == 2)
- u32 dword[2*(DMA_IS_64BIT + 1)*8]; //seg = 8
+ u32 dword[2*(DMA_IS_64BIT + 1)*8]; /* seg = 8 */
#elif (RTL8192EE_SEG_NUM == 1)
- u32 dword[2*(DMA_IS_64BIT + 1)*4]; //seg = 4
+ u32 dword[2*(DMA_IS_64BIT + 1)*4]; /* seg = 4 */
#elif (RTL8192EE_SEG_NUM == 0)
- u32 dword[2*(DMA_IS_64BIT + 1)*2]; //seg = 2
+ u32 dword[2*(DMA_IS_64BIT + 1)*2]; /* seg = 2 */
#endif
} __packed;
@@ -238,7 +238,7 @@ struct rtl_pci {
u16 shortretry_limit;
u16 longretry_limit;
-
+
/* MSI support */
bool msi_support;
bool using_msi;
@@ -335,17 +335,17 @@ static inline void rtl_pci_raw_write_port_uchar(u32 port,
u8 val)
outb(val, port);
}
-static inline void rtl_pci_raw_read_port_uchar(u32 port, u8 * pval)
+static inline void rtl_pci_raw_read_port_uchar(u32 port, u8 *pval)
{
*pval = inb(port);
}
-static inline void rtl_pci_raw_read_port_ushort(u32 port, u16 * pval)
+static inline void rtl_pci_raw_read_port_ushort(u32 port, u16 *pval)
{
*pval = inw(port);
}
-static inline void rtl_pci_raw_read_port_ulong(u32 port, u32 * pval)
+static inline void rtl_pci_raw_read_port_ulong(u32 port, u32 *pval)
{
*pval = inl(port);
}
