The V3s has a CSI0 camera controller which seems to be exclusively
dedicated to MIPI CSI-2, as it does not seem to have access to a
set of parallel input pins.

Signed-off-by: Paul Kocialkowski <paul.kocialkow...@bootlin.com>
---
 arch/arm/boot/dts/sun8i-v3s.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 0c7341676921..07722bc5df11 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -524,6 +524,18 @@ spi0: spi@1c68000 {
                        #size-cells = <0>;
                };
 
+               csi0: camera@1cb0000 {
+                       compatible = "allwinner,sun8i-v3s-csi";
+                       reg = <0x01cb0000 0x1000>;
+                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CSI>,
+                                <&ccu CLK_CSI1_SCLK>,
+                                <&ccu CLK_DRAM_CSI>;
+                       clock-names = "bus", "mod", "ram";
+                       resets = <&ccu RST_BUS_CSI>;
+                       status = "disabled";
+               };
+
                csi1: camera@1cb4000 {
                        compatible = "allwinner,sun8i-v3s-csi";
                        reg = <0x01cb4000 0x3000>;
-- 
2.28.0

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