On Wed, Oct 01, 2014 at 10:21:48AM -0700, Soren Brinkmann wrote:
> Add a driver for the Xilinx Clocking Wizard soft IP. The clocking wizard
> provides an AXI interface to dynamically reconfigure the clocking
> resources of Xilinx FPGAs.

Why not just do the few things you have on the TODO list and get it
merged to the "proper" part of the kernel, keeping it out of the staging
tree?

thanks,

greg k-h
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