Rename the CamelCase. Use the BIT() macro to define the bits.
Signed-off-by: H Hartley Sweeten <hswee...@visionengravers.com>
Cc: Ian Abbott <abbo...@mev.co.uk>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
---
drivers/staging/comedi/drivers/ni_mio_common.c | 60 +++++++++++++-------------
drivers/staging/comedi/drivers/ni_stc.h | 34 +++++++--------
2 files changed, 48 insertions(+), 46 deletions(-)
diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c
b/drivers/staging/comedi/drivers/ni_mio_common.c
index 0ac17c8..2e017dc 100644
--- a/drivers/staging/comedi/drivers/ni_mio_common.c
+++ b/drivers/staging/comedi/drivers/ni_mio_common.c
@@ -320,7 +320,7 @@ static const struct mio_regmap m_series_stc_write_regmap[]
= {
[NISTC_AO_CMD2_REG] = { 0x10a, 2 },
[NISTC_G0_CMD_REG] = { 0x10c, 2 },
[NISTC_G1_CMD_REG] = { 0x10e, 2 },
- [AI_Command_1_Register] = { 0x110, 2 },
+ [NISTC_AI_CMD1_REG] = { 0x110, 2 },
[AO_Command_1_Register] = { 0x112, 2 },
/*
* DIO_Output_Register maps to:
@@ -860,12 +860,12 @@ static void ni_clear_ai_fifo(struct comedi_device *dev)
#if 0
/* the NI example code does 3 convert pulses for 625x
boards,
but that appears to be wrong in practice. */
- ni_stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
- ni_stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
- ni_stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_CONVERT_PULSE,
+ NISTC_AI_CMD1_REG);
+ ni_stc_writew(dev, NISTC_AI_CMD1_CONVERT_PULSE,
+ NISTC_AI_CMD1_REG);
+ ni_stc_writew(dev, NISTC_AI_CMD1_CONVERT_PULSE,
+ NISTC_AI_CMD1_REG);
#endif
}
}
@@ -1629,7 +1629,7 @@ static int ni_ai_reset(struct comedi_device *dev, struct
comedi_subdevice *s)
if (!devpriv->is_6143)
ni_writeb(dev, 0, Misc_Command);
- ni_stc_writew(dev, AI_Disarm, AI_Command_1_Register); /* reset pulses */
+ ni_stc_writew(dev, NISTC_AI_CMD1_DISARM, NISTC_AI_CMD1_REG);
ni_stc_writew(dev, AI_Start_Stop | AI_Mode_1_Reserved
/*| AI_Trigger_Once */,
AI_Mode_1_Register);
@@ -1727,7 +1727,7 @@ static void ni_prime_channelgain_list(struct
comedi_device *dev)
{
int i;
- ni_stc_writew(dev, AI_CONVERT_Pulse, AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_CONVERT_PULSE, NISTC_AI_CMD1_REG);
for (i = 0; i < NI_TIMEOUT; ++i) {
if (!(ni_stc_readw(dev, AI_Status_1_Register) &
AI_FIFO_Empty_St)) {
@@ -1971,13 +1971,13 @@ static int ni_ai_insn_read(struct comedi_device *dev,
signbits = devpriv->ai_offset[0];
if (devpriv->is_611x) {
for (n = 0; n < num_adc_stages_611x; n++) {
- ni_stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_CONVERT_PULSE,
+ NISTC_AI_CMD1_REG);
udelay(1);
}
for (n = 0; n < insn->n; n++) {
- ni_stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_CONVERT_PULSE,
+ NISTC_AI_CMD1_REG);
/* The 611x has screwy 32-bit FIFOs. */
d = 0;
for (i = 0; i < NI_TIMEOUT; i++) {
@@ -2003,8 +2003,8 @@ static int ni_ai_insn_read(struct comedi_device *dev,
}
} else if (devpriv->is_6143) {
for (n = 0; n < insn->n; n++) {
- ni_stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_CONVERT_PULSE,
+ NISTC_AI_CMD1_REG);
/* The 6143 has 32-bit FIFOs. You need to strobe a bit
to move a single 16bit stranded sample into the FIFO */
dl = 0;
@@ -2025,8 +2025,8 @@ static int ni_ai_insn_read(struct comedi_device *dev,
}
} else {
for (n = 0; n < insn->n; n++) {
- ni_stc_writew(dev, AI_CONVERT_Pulse,
- AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_CONVERT_PULSE,
+ NISTC_AI_CMD1_REG);
for (i = 0; i < NI_TIMEOUT; i++) {
if (!(ni_stc_readw(dev, AI_Status_1_Register) &
AI_FIFO_Empty_St))
@@ -2341,7 +2341,7 @@ static int ni_ai_cmd(struct comedi_device *dev, struct
comedi_subdevice *s)
mode1 |= AI_Start_Stop | AI_Mode_1_Reserved | AI_Trigger_Once;
ni_stc_writew(dev, mode1, AI_Mode_1_Register);
/* load SC (Scan Count) */
- ni_stc_writew(dev, AI_SC_Load, AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_SC_LOAD, NISTC_AI_CMD1_REG);
if (stop_count == 0) {
devpriv->ai_cmd2 |= NISTC_AI_CMD2_END_ON_EOS;
@@ -2360,7 +2360,7 @@ static int ni_ai_cmd(struct comedi_device *dev, struct
comedi_subdevice *s)
ni_stc_writew(dev, mode1, AI_Mode_1_Register);
/* load SC (Scan Count) */
- ni_stc_writew(dev, AI_SC_Load, AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_SC_LOAD, NISTC_AI_CMD1_REG);
break;
}
@@ -2394,7 +2394,7 @@ static int ni_ai_cmd(struct comedi_device *dev, struct
comedi_subdevice *s)
timer = ni_ns_to_timer(dev, cmd->scan_begin_arg,
CMDF_ROUND_NEAREST);
ni_stc_writel(dev, timer, AI_SI_Load_A_Registers);
- ni_stc_writew(dev, AI_SI_Load, AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_SI_LOAD, NISTC_AI_CMD1_REG);
break;
case TRIG_EXT:
if (cmd->scan_begin_arg & CR_EDGE)
@@ -2431,8 +2431,7 @@ static int ni_ai_cmd(struct comedi_device *dev, struct
comedi_subdevice *s)
mode2 |= AI_SI2_Reload_Mode;
ni_stc_writew(dev, mode2, AI_Mode_2_Register);
- /* AI_SI2_Load */
- ni_stc_writew(dev, AI_SI2_Load, AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_SI2_LOAD, NISTC_AI_CMD1_REG);
mode2 |= AI_SI2_Reload_Mode; /* alternate */
mode2 |= AI_SI2_Initial_Load_Source; /* B */
@@ -2515,15 +2514,18 @@ static int ni_ai_cmd(struct comedi_device *dev, struct
comedi_subdevice *s)
switch (cmd->scan_begin_src) {
case TRIG_TIMER:
- ni_stc_writew(dev,
- AI_SI2_Arm | AI_SI_Arm | AI_DIV_Arm | AI_SC_Arm,
- AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_SI2_ARM |
+ NISTC_AI_CMD1_SI_ARM |
+ NISTC_AI_CMD1_DIV_ARM |
+ NISTC_AI_CMD1_SC_ARM,
+ NISTC_AI_CMD1_REG);
break;
case TRIG_EXT:
- /* XXX AI_SI_Arm? */
- ni_stc_writew(dev,
- AI_SI2_Arm | AI_SI_Arm | AI_DIV_Arm | AI_SC_Arm,
- AI_Command_1_Register);
+ ni_stc_writew(dev, NISTC_AI_CMD1_SI2_ARM |
+ NISTC_AI_CMD1_SI_ARM | /* XXX ? */
+ NISTC_AI_CMD1_DIV_ARM |
+ NISTC_AI_CMD1_SC_ARM,
+ NISTC_AI_CMD1_REG);
break;
}
diff --git a/drivers/staging/comedi/drivers/ni_stc.h
b/drivers/staging/comedi/drivers/ni_stc.h
index 7f88dd4..ecd80bc 100644
--- a/drivers/staging/comedi/drivers/ni_stc.h
+++ b/drivers/staging/comedi/drivers/ni_stc.h
@@ -129,6 +129,23 @@
#define NISTC_G0_CMD_REG 6
#define NISTC_G1_CMD_REG 7
+#define NISTC_AI_CMD1_REG 8
+#define NISTC_AI_CMD1_ATRIG_RESET BIT(14)
+#define NISTC_AI_CMD1_DISARM BIT(13)
+#define NISTC_AI_CMD1_SI2_ARM BIT(12)
+#define NISTC_AI_CMD1_SI2_LOAD BIT(11)
+#define NISTC_AI_CMD1_SI_ARM BIT(10)
+#define NISTC_AI_CMD1_SI_LOAD BIT(9)
+#define NISTC_AI_CMD1_DIV_ARM BIT(8)
+#define NISTC_AI_CMD1_DIV_LOAD BIT(7)
+#define NISTC_AI_CMD1_SC_ARM BIT(6)
+#define NISTC_AI_CMD1_SC_LOAD BIT(5)
+#define NISTC_AI_CMD1_SCAN_IN_PROG_PULSE BIT(4)
+#define NISTC_AI_CMD1_EXTMUX_CLK_PULSE BIT(3)
+#define NISTC_AI_CMD1_LOCALMUX_CLK_PULSE BIT(2)
+#define NISTC_AI_CMD1_SC_TC_PULSE BIT(1)
+#define NISTC_AI_CMD1_CONVERT_PULSE BIT(0)
+
#define AI_Status_1_Register 2
#define Interrupt_A_St 0x8000
#define AI_FIFO_Full_St 0x4000
@@ -171,23 +188,6 @@
#define DIO_Parallel_Input_Register 7
-#define AI_Command_1_Register 8
-#define AI_Analog_Trigger_Reset _bit14
-#define AI_Disarm _bit13
-#define AI_SI2_Arm _bit12
-#define AI_SI2_Load _bit11
-#define AI_SI_Arm _bit10
-#define AI_SI_Load _bit9
-#define AI_DIV_Arm _bit8
-#define AI_DIV_Load _bit7
-#define AI_SC_Arm _bit6
-#define AI_SC_Load _bit5
-#define AI_SCAN_IN_PROG_Pulse _bit4
-#define AI_EXTMUX_CLK_Pulse _bit3
-#define AI_LOCALMUX_CLK_Pulse _bit2
-#define AI_SC_TC_Pulse _bit1
-#define AI_CONVERT_Pulse _bit0
-
#define AO_Command_1_Register 9
#define AO_Analog_Trigger_Reset _bit15
#define AO_START_Pulse _bit14
--
2.3.0
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