From: Alan Tull <at...@opensource.altera.com>

Add documentation under drivers/staging for new fpga manager's
sysfs interface.

Signed-off-by: Alan Tull <at...@opensource.altera.com>
---
v5  : (actually second version, but keeping version numbers
      aligned with rest of patch series)
      Move document to drivers/staging/fpga/Documentation/ABI

v6  : No change in this patch for v6 of the patch set

v7  : No change in this patch for v7 of the patch set

v8  : No change in this patch for v8 of the patch set

v9  : Remove 'firmware' and 'reset' files
      Update state strings
---
 .../Documentation/ABI/sysfs-class-fpga-manager     |   26 ++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 
drivers/staging/fpga/Documentation/ABI/sysfs-class-fpga-manager

diff --git a/drivers/staging/fpga/Documentation/ABI/sysfs-class-fpga-manager 
b/drivers/staging/fpga/Documentation/ABI/sysfs-class-fpga-manager
new file mode 100644
index 0000000..470905e
--- /dev/null
+++ b/drivers/staging/fpga/Documentation/ABI/sysfs-class-fpga-manager
@@ -0,0 +1,26 @@
+What:          /sys/class/fpga_manager/<fpga>/name
+Date:          July 2015
+KernelVersion: 4.2
+Contact:       Alan Tull <at...@opensource.altera.com>
+Description:   Name of low level fpga manager driver.
+
+What:          /sys/class/fpga_manager/<fpga>/state
+Date:          July 2015
+KernelVersion: 4.2
+Contact:       Alan Tull <at...@opensource.altera.com>
+Description:   Read fpga manager state as a string.
+               Valid states may vary by manufacturer; superset is:
+               * unknown               = can't determine state
+               * power off             = FPGA power is off
+               * power up              = FPGA reports power is up
+               * reset                 = FPGA held in reset state
+               * firmware request      = firmware class request in progress
+               * firmware request error = firmware request failed
+               * write init            = FPGA being prepared for programming
+               * write init error      = Error while preparing FPGA for
+                                         programming
+               * write                 = FPGA ready to receive image data
+               * write error           = Error while programming
+               * write complete        = Doing post programming steps
+               * write complete error  = Error while doing post programming
+               * operating             = FPGA is programmed and operating
-- 
1.7.9.5

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