On 2015/10/27 7:15, ja...@microsoft.com wrote:
> From: Jake Oshins <ja...@microsoft.com>
>
> This patch introduces a new driver which exposes a root PCI bus whenever a PCI
> Express device is passed through to a guest VM under Hyper-V. The device can
> be single- or multi-function. The interrupts for the devices are managed by an
> IRQ domain, implemented within the driver.
>
> Signed-off-by: Jake Oshins <ja...@microsoft.com>
> ---
<snit>
> +
> +/**
> + * hv_pcie_init_irq_domain() - Initialize IRQ domain
> + * @hbus: The root PCI bus
> + *
> + * Return: '0' on success and error value on failure
> + */
> +static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
> +{
> + hbus->msi_info.chip = &hv_msi_irq_chip;
> + hbus->msi_info.chip_data = hbus;
> + hbus->msi_info.ops = &hv_msi_ops;
> + hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
> + MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
> + MSI_FLAG_PCI_MSIX);
When interrupt remapping is not supported, x86 vector allocator
can't support multiple MSI because it can't allocate continuous
vectors yet. So please confirm whether we could enable
MSI_FLAG_MULTI_PCI_MSI for HV.
> + hbus->msi_info.handler = handle_edge_irq;
> + hbus->msi_info.handler_name = "edge";
> + hbus->msi_info.data = hbus;
How about using following pattern so we could avoid exporting
too many interfaces?
struct irq_domain *parent_domain = NULL;
hbus->msi_info.chip = &hv_msi_irq_chip;
hbus->msi_info.ops = &hv_msi_ops;
// Let arch code to fill in default ops for chip and domain
x86_setup_default_msi_irqdomian_info(&hbus->msi_info, &parent_domain);
// Override default ops if not applicable
hbus->irq_domain = pci_msi_create_irq_domain(hbus->fwnode,
&hbus->msi_info,
parent_domain);
> + hbus->irq_domain = pci_msi_create_irq_domain(hbus->fwnode,
> + &hbus->msi_info,
> + x86_vector_domain);
> + if (!hbus->irq_domain) {
> + pr_err("Failed to build an MSI IRQ domain\n");
> + return -ENODEV;
> + }
> +
> + return 0;
> +}
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