Fixed coding style issue

Signed-off-by: Nadim Almas <nadim....@gmail.com>
---
 drivers/staging/dgnc/dgnc_neo.h | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/dgnc/dgnc_neo.h b/drivers/staging/dgnc/dgnc_neo.h
index abddd48..65994e3 100644
--- a/drivers/staging/dgnc/dgnc_neo.h
+++ b/drivers/staging/dgnc/dgnc_neo.h
@@ -30,7 +30,8 @@
 struct neo_uart_struct {
        u8 txrx;                /* WR  RHR/THR - Holding Reg */
        u8 ier;         /* WR  IER - Interrupt Enable Reg */
-       u8 isr_fcr;             /* WR  ISR/FCR - Interrupt Status Reg/Fifo 
Control Reg */
+       u8 isr_fcr;     /* WR  ISR/FCR - Interrupt Status Reg/Fifo Control */
+                                                                       /*Reg */
        u8 lcr;         /* WR  LCR - Line Control Reg */
        u8 mcr;         /* WR  MCR - Modem Control Reg */
        u8 lsr;         /* WR  LSR - Line Status Reg */
@@ -108,7 +109,8 @@ struct neo_uart_struct {
 /* 17158 Extended IIR's */
 #define UART_17158_IIR_RDI_TIMEOUT     0x0C    /* Receiver data TIMEOUT */
 #define UART_17158_IIR_XONXOFF         0x10    /* Received an XON/XOFF char */
-#define UART_17158_IIR_HWFLOW_STATE_CHANGE 0x20        /* CTS/DSR or RTS/DTR 
state change */
+#define UART_17158_IIR_HWFLOW_STATE_CHANGE 0x20        /* CTS/DSR or RTS/DTR 
state */
+                                                               /* change */
 #define UART_17158_IIR_FIFO_ENABLED    0xC0    /* 16550 FIFOs are Enabled */
 
 /*
@@ -119,8 +121,10 @@ struct neo_uart_struct {
 #define UART_17158_RXRDY_TIMEOUT       0x2     /* RX Ready Timeout */
 #define UART_17158_TXRDY               0x3     /* TX Ready */
 #define UART_17158_MSR                 0x4     /* Modem State Change */
-#define UART_17158_TX_AND_FIFO_CLR     0x40    /* Transmitter Holding Reg 
Empty */
-#define UART_17158_RX_FIFO_DATA_ERROR  0x80    /* UART detected an RX FIFO 
Data error */
+#define UART_17158_TX_AND_FIFO_CLR     0x40    /* Transmitter Holding Reg */
+                                                               /* Empty */
+#define UART_17158_RX_FIFO_DATA_ERROR  0x80    /* UART detected an RX FIFO */
+                                                               /* Data error */
 
 /*
  * These are the EXTENDED definitions for the 17C158's Interrupt
@@ -132,8 +136,10 @@ struct neo_uart_struct {
 #define UART_17158_EFR_RTSDTR  0x40    /* Auto RTS/DTR Flow Control Enable */
 #define UART_17158_EFR_CTSDSR  0x80    /* Auto CTS/DSR Flow COntrol Enable */
 
-#define UART_17158_XOFF_DETECT 0x1     /* Indicates whether chip saw an 
incoming XOFF char  */
-#define UART_17158_XON_DETECT  0x2     /* Indicates whether chip saw an 
incoming XON char */
+#define UART_17158_XOFF_DETECT 0x1     /* Indicates whether chip saw an */
+                                               /* incoming XOFF char  */
+#define UART_17158_XON_DETECT  0x2     /* Indicates whether chip saw an */
+                                                       /* incoming XON char */
 
 #define UART_17158_IER_RSVD1   0x10    /* Reserved by Exar */
 #define UART_17158_IER_XOFF    0x20    /* Xoff Interrupt Enable */
-- 
2.7.4

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